Senior FPGA Engineer - Military veterans preferred

Raytheon (


  full-time   employee

Salt Lake City
United States

At Raytheon Applied Signal Technology, the dynamic and diverse develop demanding, trusted, superior solutions to make the world a safer place, and we are looking for a senior level field programmable gate array engineer for our Salt Lake City, UT locations, to design, build and maintain advanced high-capacity systems that process modern high-speed communications for the U.S. intelligence community.

You will work as a task lead and technical contributor on cutting-edge technology for RAST, which develops systems to provide integrated sensor and signal processing products in support of intelligence, surveillance and reconnaissance that protect your family, your nation and enhance global security, while in your free time you can explore the many wonders of Utah. Raytheon offers robust reward and recognition programs in compensation, career development, health care, educational assistance, maternal and paternal leave, flexible work schedules, child/adult backup care, 401(k), paid holidays and paid time off.

You must have a solid understanding of FPGA development processes and digital design practices; have background knowledge in signal processing and/or network communications; have experience with implementation of signal processing and/or communications algorithms in FPGA environments; be capable of translating functional requirements into efficient working designs; apply strong task planning and management skills to lead a team of engineers to execute development efforts to meet technical, schedule, budget and quality requirements; have strong communication skills; and use technical expertise to provide imaginative, thorough, practicable and organizationally aligned solutions to a wide range of difficult developmental challenges.

Required Skills:

  • Minimum of six years of FPGA developmental experience
  • Strong comprehension of FPGA development environments and FPGA development tool flows
  • Strong working knowledge of VHDL, Verilog, and/or System Verilog HDL languages
  • Proven ability to design, implement and document FPGA designs from component level specifications
  • Proven ability to define and perform FPGA component level integration and test plans
  • Proven ability to resolve FPGA integration and test issues in hands-on lab environments Experience providing reliable FPGA cost/schedule estimates for developmental activities
  • Experience in leading a team of 2–5 FPGA engineers and/or other technical staff in design, implementation, integration and test activities; includes planning, estimating and managing execution to meet schedule and cost targets
  • Clear written and verbal communication skills
  • Ability to work independently and collaboratively in team environments
  • U.S. Citizenship status is required as this position will require the ability to access US only data systems.
  • U.S. Citizenship status required as this position will need a U.S. Secret Security Clearance within 1 year of start date.

Desired Skills:
  • Active TS/SCI within the last two years
  • Background in digital signal processing and/or network processing FPGA applications
  • amiliarity with high-level FPGA HDL code generation tool flows (Matlab, Simulink, C/C++)
  • Familiarity with circuit card design, implementation, integration, and test

Required Education: Bachelor of Science, Electrical Engineering or equivalent

Desired Education: Master of Science in Electrical Engineering or equivalent

Raytheon is an Equal Opportunity/Affirmative Action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, sex, sexual orientation, gender identity, national origin, disability, or protected Veteran status.