Principal ASIC/FPGA engineer - Military veterans preferred

Raytheon (


  full-time   employee

El Segundo
United States

Job Description:
The candidate will be working on state-of-the-art ASIC design using advance technology node for navigation application.
The candidate will be responsible to translate requirement to ASIC implementation, using the latest in EDA tools.

Required Skills:

  • Experience ASIC design with minimum 10 years hands-on experience.
  • Experience with implementing algorithm design and analysis
  • Strong RTL coding and debug abilities
  • Experience with MatLab and Symulink Modeling
  • Knowledge with ARM based processors designs
  • Experience with RTL Simulation, Synthesis and Static Timing Analysis
  • Experience with Low Power Designs
  • Working knowledge with System Verilog and Assertion Based Verification methodology
  • Must be fluent with VHDL, Verilog, C/C++ or other object oriented programming language, LINUX scripting including perl, make, python.
  • Fluent in FPGA and ASIC design processes with 10+ years of relevant experience in ASIC SOC designs.
  • U.S. Citizenship status is required as this position will need a U.S. Security Clearance within 1 year of start date.
  • U.S. Citizenship and ability to access US only data systems.

Desired Skills:
  • Working knowledge of RTL Acceleration/Emulation tools (e.g. Veloce, ZeBu, Palladium, Podium).
  • Working knowledge with latest ASIC verification methodology (UVM, AMS)
  • Working knowledge of Low Power flow and Low Power Methodology.
  • Working knowledge of communication data path designs.

Required Education: BS Engineering in Electrical Engineering, Computer Engineering

Desired Education: MS Engineering Preferred

Raytheon is an Equal Opportunity/Affirmative Action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, sex, sexual orientation, gender identity, national origin, disability, or protected Veteran status.