S&S - FPGA Engineer - Military veterans preferred

Job Title: FPGA Engineer

Department: Digital Modem Engineering

Reports To: Director of Digital Engineering

FLSA Status: Exempt

Last Modified: 4/9/2024

Company Overview

Comtech Telecommunications Corp. is a leading global technology company providing terrestrial and wireless network solutions, next-generation 9-1-1 emergency services, satellite and space communications technologies, and cloud-native capabilities to commercial and government customers around the world. Our unique culture of innovation and employee empowerment unleashes a relentless passion for customer success. With multiple facilities located in technology corridors throughout the United States and around the world, Comtech leverages our global presence, technology leadership, and decades of experience to create the world’s most innovative communications solutions. For more information, please visit www.comtech.com.

We’re seeking curious, growth-minded thinkers to help shape our vision, structures, and systems; playing a key role as we launch into our ambitious future. If you’re invigorated by our mission, values, and drive to change the world — we’d love to have you apply.

Position Summary

We’re seeking curious, growth-minded thinkers to help shape our vision, structures, and systems; playing a key role as we launch into our ambitious future. If you’re invigorated by our mission, values, and drive to change the world — we’d love to have you apply.

Responsibilities

• Modify existing and create new HDL designs.
• Create HDL simulations to verify functionality.
• Create high-level programming language (C, Python, Matlab) simulations to demonstrate proof-of-concept prior to designing HDL blocks.
• Defend assumptions and performance results.
• Generate FPGA size, power, and feature requirements.
• Create realistic schedule commitments.
• Create, analyze, document and test system and subsystem designs.
• Support Business Development activities including customer briefings, support and/or leading technical sections for proposals for large Government or commercial RFPs.

Qualifications

• 0-5 years of FPGA experience:
  1. Implementation using Verilog and VHDL hardware description languages.
  2. Simulation tools (ActiveHDL, RivieraPRO, SystemVerilog, Questa)
  3. FPGA/Processor SoCs (Agilex, Zynq)
  4. FPGA communications protocols (PCIe, 100 GbE, SerDes)
• 0-5 years hardware experience:
  1. Board-level schematic capture and debug
  2. Bench test equipment (digital oscilloscope, logic analyzer, spectrum analyzer)
• Demonstrated experience supporting multi-disciplinary, cross functional and matrixed teams
• Strong communication skills and experience presenting to customers and senior leadership; ability to effectively work and communicate with all levels of management and customers
• Proficient in Microsoft Office Tools (Word, Excel, PowerPoint, Visio, etc.).

Education

Not Required but Considered a Plus

• Working knowledge of embedded system is a plus. Familiar with some Linux OS distribution for embedded system.
• 3 years of DSP, Wireless Communications, RF experience:
  1. Defining, analyzing, and validating wireless communication requirements spanning user data network processing through RF
  2. End-to-end SATCOM ground station architecture from the physical layer through the application layer
  3. Communication waveform experience (DVB-S2X, DSSS, FHSS)
  4. 3+ years DoD experience:
• Satisfying DoD contractual obligations: Hardware/Software Requirements Specifications (HRS/SRS) and Hardware/Software Design Documents (HDD/SDD)
• Presenting to DoD customers: System Design Review (SDR), Preliminary Design Review (PDR), Critical Design Review (CDR)
• Active DoD Top Secret clearance
• Master’s Degree in Electrical Engineering

About:

Comtech Telecommunications Corp. is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability or protected veteran status.